Design of an IDM-based determinant computing unit for a 130nm low power CMOS ASIC acoustic localization processor - Cerdas-Robles, Roberto; Rodríguez, Agustín; Julián, Pedro; Chacón-Rodríguez, Alfonso (Institute of Electrical and Electronics Engineers Inc., 2015)
A determinant computing circuit in floating point format has been designed and tested for use in a CMOS ASIC acoustic localization processor. The Internal Division Method (IDM) was used to implement the operation, employing a modified SRT radix-4 circuit for division operations. The unit was designed for VLSI implementation in a commercial 130nm low-power CMOS process, with an operation frequency of 100MHz. The algorithm employed is parallelizable for future prototypes, should a higher operation frequency be required.
https://www.scopus.com/inward/record.url?eid=2-s2.0-84945151182&partnerID=40&md5=6ddf5c2778c6b512bf6531ff81a9fd36
Keywords: Circuit, CMOS, aritmética, FPGA; Circuitos; CMOS; Aritmética; FPGA; Research Subject Categories::TECHNOLOGY::Information technology::Computer science::Computer science