Desarrollo de un módulo de decodi cación de la para una memoria SRAM de 2 kb, en un proceso CMOS de 180 nm

Abstract

At the Instituto Tecnol ogico de Costa Rica, at the Escuela de Ingenier a Electr onica, the DCILab (Laboratorio de Dise~no de Circuitos Integrados), is currently developing an ISA RISC-V 32 E microarchitecture, oriented to implantable medic devices with advanced processing. It was developed the access decoder and its peripherals of the memory, part of the MMU in this microarchitecture. The objective is to build di erent cells that function as a standard part of a library and then create an automatic memory generator of the laboratory itself in future projects.