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dc.contributor.authorDupuis, Nicolas
dc.contributor.authorLee, Benjamin
dc.contributor.authorProesel, Jonathan
dc.contributor.authorRylyakov, Alexander
dc.contributor.authorRimolo-Donadio, Renato
dc.contributor.authorBaks, Christian
dc.contributor.authorAbhijeet, Ardey
dc.contributor.authorSchow, Clint
dc.contributor.authorRamaswamy, Anand
dc.contributor.authorRoth, Jonathan
dc.contributor.authorRobert, Guzzon
dc.contributor.authorKoch, Brian
dc.contributor.authorSparacin, Daniel
dc.contributor.authorFish, Greg
dc.date.accessioned2017-06-05T18:35:09Z
dc.date.available2017-06-05T18:35:09Z
dc.date.issued2015-02
dc.identifierhttps://ieeexplore.ieee.org/document/6936315/es
dc.identifier.issn07338724
dc.identifier.urihttps://hdl.handle.net/2238/7188
dc.descriptionhttps://www.scopus.com/inward/record.url?eid=2-s2.0-84923347115&partnerID=40&md5=5880e003b3aaac1af96bfc0568a8fa98es
dc.description.abstractWe present a silicon photonics optical link utilizing heterogeneously integrated photonic devices driven by low-power advanced 32-nm CMOS integrated circuits. The photonic components include a quantum-confined Stark effect electroabsorption modulator and an edge-coupled waveguide photodetector, both made of III-V material wafer bonded on silicon-on-insulator wafers. The photonic devices are wire bonded to the CMOS chips and mounted on a custom PCB card for testing. We demonstrate an error-free operation at data rates up to 30 Gb/s and transmission over 10 km at 25 Gb/s with no measured sensitivity penalty and a timing margin penalty of 0.2 UI.es
dc.language.isoenges
dc.publisherInstitute of Electrical and Electronics Engineers Inc.es
dc.rightsacceso abierto*
dc.rights.urihttps://creativecommons.org/licenses/by-nc/3.0/cr/*
dc.sourceJournal of Lightwave Technolo. Volume: 33 Issue: 3es
dc.subjectCircuitoses
dc.subjectFotodetectoreses
dc.subjectFotónicaes
dc.subjectPotencia eléctricaes
dc.subjectResearch Subject Categories::TECHNOLOGY::Electrical engineering, electronics and photonics::Electrical engineeringes
dc.title30-Gb/s Optical Link Combining Heterogeneously Integrated III–V/Si Photonics With 32-nm CMOS Circuitses
dc.typeartículo originales


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