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Diseño y Evaluación de Arquitecturas de Enrutador Basado en Tablas de Enrutamiento Estáticas Orientadas al uso en \Network on Chip
(Instituto Tecnológico de Costa Rica, 2018)
This work presents an implementation of a parameterized router architecture
based on static tables for its use on Network on Chip; For this, a
parallel bus of parallel data input with central arbiter was designed, this
was ...