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Diseño de un acelerador de hardware para simulaciones de redes neuronales biológicamente precisas utilizando un sistema multi-FPGA
(Instituto Tecnológico de Costa Rica, 2017)
An FPGA-synthesizable IP was implemented in order to compute a neural network using
the extended Hodgkin-Huxley algorithm. An Euler aproximation algorithm written in
the programming language C was used as input code, ...