Energy-Aware Signal Integrity Analysis for High-Speed PCB Links

Abstract

This paper proposes a novel approach to evaluate design alternatives for high-speed links on printed circuit boards. The approach combines evaluations of signal integrity and link input power. For a comprehensive analysis, different link designs are made comparable through the application of identical constraints, with the link input power as the single figure of merit for a systematic, quantitative comparison of design alternatives. The analysis relies upon a combination of efficient physics-based via and trace models, statistical time-domain simulation, and an analytical input power evaluation, which allows it to handle links consisting of a large number of channels while fully taking into account interchannel crosstalk. The proposed approach is applied to study two fundamental design decisions at the PCB level—single-ended versus differential signaling and signal-to-ground via ratios of 1:1 versus 2:1—for a link consisting of 2048 vias and up to 175 striplines with an aggregate data rate of 1 Tb/s. It is found that both design decisions have a considerable impact on the required input power of the link.