Integración de un microprocesador de aplicación específica en un flujo de diseño de circuitos integrados digitales

Abstract

This document presents a semipersonalized design methodology of digital integrated circuits, by using of Synopsys tools and a 0,13 m CMOS technology. The design ow is made through a scripting structure, mainly in languages like TCL, Bash, and PERL, wich are consistent with the semantics of Synopsys tools. This work discusses how the le and directory hierarchy is developed to locate source les and output products. The e ectiveness of the ow is analyzed by subjecting the RTL of a RISC-V arquitectured Speci c Application Microprocessor (ASP). It discusses the integration of a physical cell for the ASP oating-point unit and the physical cells of the ASP data and program memories. The analysis is performed on the reports generated by the tool, and deterministic veri cation on the RTL and GLN, through simulations generated from test benches, that derives from a golden reference model implementet in a high level programming language.