Macromodel Extraction for Drivers in High-Speed Communications Channels

Abstract

This thesis describes the process performed for extracting a descriptive macromodel for a generic transmitter block at IC level for high-speed channels applications. The work has been focused on a first approach to establish at methodology to extract a macromodel considering both the signal and power domains. Macromodels are required to perform accurate and numerically efficient simulations, in order to verify and validate behavior performances of communication links without having to consider the full driver model and potential IP sensitive information related to it. In this work, different approaches for macromodeling generation are reviewed and a methodology based on the IBIS specification is explored. A driver specific topology had been chosen in order to exercise the methodology for macromodel generation. An important feature of the methodology is the possibility to include the effects concerning signal integrity and power integrity simultaneously, which was carried out by including controlled sources on the output of the driver.